Instruction cracking based on machine state
AssigneeInternational Business Machines Corporation
InventorsFadi BUSABA, Bruce GIAMEI, David HUTTON, Eric SCHWARZ
Life of this patent
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Abstract
A method, information processing system, and computer program product manage instruction execution based on machine state. At least one instruction is received. The at least one instruction is decoded. A current machine state is determined in response to the decoding. The at least one instruction is organized into a set of unit of operations based on the current machine state that has been determined. The set of unit of operations is executed.
Claims20
A method for managing instruction execution based on a current machine state, the method comprising:
- receiving at least one instruction;
- decoding the at least one instruction;
- determining, in response to the decoding, a current machine state;
- organizing, based on the current machine state that has been determined and in an instruction decode unit with an instruction shortening unit as part of a processor core, the at least one instruction into a set of unit of operations for a fixed size queue to meet a given cycle time requirement by reducing at least one of execution steps and execution pipes;
- and
- executing the set of unit of operations.
An information processing system for managing instruction execution based on a current machine state, the information system comprising:
- a processor;
- a memory communicatively coupled to the processor;
- an instruction decoding unit configured to:
- receive at least one instruction;
- and
- decode the at least one instruction;
- a current machine state determining unit configured to determine, in response to the at least one instruction being decoded, a current machine state;
- and
- an instruction cracking unit within the processor configured to organize, based on the current machine state that has been determined and in an instruction decode unit with an instruction shortening unit as part of a processor core, the at least one instruction into a set of unit of operations for a fixed size queue to meet a given cycle time requirement by reducing at least one of execution steps and execution pipes,
- wherein the processor is configured to execute the set of unit of operations.
A computer program product for managing instruction execution based on a current machine state, the computer program product comprising:
- a storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
- receiving at least one instruction;
- decoding the at least one instruction;
- determining, in response to the decoding, a current machine state;
- organizing, based the current machine state that has been determined and in an instruction decode unit with an instruction shortening unit as part of a processor core, the at least one instruction into a set of unit of operations for a fixed size queue to meet a given cycle time requirement by reducing at least one of execution steps and execution pipes;
- and
- executing the set of unit of operations.
Dependencies are inferred from the claim text.