Memory Controllers, Systems, and Methods Supporting Multiple Request Modes
AssigneeRambus Inc.
InventorsRichard E. Perego, Frederick A. Ware
Life of this patent
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AssigneeRambus Inc.
InventorsRichard E. Perego, Frederick A. Ware
Estimating the term…
A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports are coupled, via point-to-point connections, to from one to N memory devices, each of which includes N independently addressable memory blocks. All of the external request ports are connected to respective external request ports on the memory device or devices used in a given configuration. The number of request ports per memory device and the data width of each memory device changes with the number of memory devices such that the ratio of the request-access granularity to the data granularity remains constant irrespective of the number of memory devices.
A memory controller supporting at least two different operation modes, including a first mode in which a first memory is used for memory access, the first memory having first and second sections of memory cells, and a second mode in which the first memory and a second memory are used for memory access, the memory controller comprising:
A method of operation in a memory system, the method comprising:
A memory system, comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.