Non-volatile memory access method and system, and non-volatile memory controller
AssigneePhison Electronics Corp.
InventorMing-Hui Lin
Life of this patent
Estimating the term…
Abstract
A non-volatile memory access method and system, and a non-volatile memory controller are provided for accessing a plurality of physical blocks in a non-volatile memory chip, and each physical block has a plurality of physical pages. The method includes determining whether there is enough space in a first physical block to write a plurality of specific physical pages when data stored in one of the specific physical pages are to be updated; and writing valid data and data to be updated into the first physical block when the first physical block has enough space to write the specific physical pages.
Claims25
A non-volatile memory access method for accessing a plurality of physical blocks in a non-volatile memory chip, wherein each of the physical blocks has a plurality of physical pages, the non-volatile memory access method comprises:
- when data stored in one of a plurality of specific physical pages in a first physical block are to be updated, determining whether there is enough space in the first physical block to write the specific physical pages;
- and
- when there is enough space in the first physical block to write the specific physical pages, writing valid data of the specific physical pages and data to be updated into the first physical block.
A non-volatile memory access method for accessing a plurality of physical blocks in a non-volatile memory chip, wherein each of the physical blocks has a plurality of physical pages, and the physical pages comprise a plurality of fast physical pages and a plurality of slow physical pages, the non-volatile memory access method comprises:
- when a host system attempts to write data to a first physical block, determining whether a predetermined number of physical pages in the first physical block have been fully written;
- and
- when the predetermined number of physical pages have been fully written, selecting a second physical block to write the data, wherein the predetermined number of physical pages are at least two physical pages and include the fast physical pages and the slow physical pages, and when the predetermined number of physical pages have been fully written, there are some of the physical pages in the first physical block that have not been written data.
A non-volatile memory controller, disposed in a non-volatile memory access device which comprises a non-volatile memory chip, wherein the non-volatile memory chip comprises a plurality of physical blocks, and each of the physical blocks has a plurality of physical pages, the non-volatile memory controller comprises:
- a microprocessor unit;
- a non-volatile memory interface unit, coupled to the microprocessor unit, for coupling to the non-volatile memory chip;
- a host interface unit, coupled to the microprocessor unit, for coupling to a host system;
- and
- a memory management unit, coupled to the microprocessor unit,
- wherein when the host system attempts to update data stored in one of a plurality of specific physical pages in a first physical block among the physical blocks, the memory management unit determines whether there is enough space in the first physical block to write the specific physical pages,
- when there is enough space in the first physical block to write the specific physical pages, valid data of the specific physical pages and data to be updated are written into the first physical block.
A non-volatile memory controller, disposed in a non-volatile memory access device which comprises a non-volatile memory chip, wherein the non-volatile memory chip comprises a plurality of physical blocks, each of the physical blocks has a plurality of physical pages, and the physical pages comprise a plurality of fast physical pages and a plurality of slow physical pages, the non-volatile memory controller comprises:
- a microprocessor unit;
- a non-volatile memory interface unit, coupled to the microprocessor unit, for coupling to the non-volatile memory chip;
- a host interface unit, coupled to the microprocessor unit, for coupling to a host system;
- and
- a memory management unit, coupled to the microprocessor unit,
- wherein when the host system attempts to write data to a first physical block among the physical blocks, the memory management unit determines whether a predetermined number of physical pages in the first physical block have been fully written, and wherein the predetermined number of physical pages are at least two physical pages and comprise the fast physical pages and the slow physical pages, when the predetermined number of physical pages have been fully written, there are still some physical pages in the first physical block that have not been written data, and the memory management unit selects a second physical block for writing the data.
A non-volatile memory access system, comprising:
- a non-volatile memory chip, having a plurality of physical blocks, wherein each of the physical blocks has a plurality of physical pages;
- a connector, coupled to a host system;
- and
- a non-volatile memory controller, coupled to the non-volatile memory chip and the connector, wherein when the host system attempts to update data stored in one of a plurality of specific physical pages in a first physical block among the physical blocks, the non-volatile memory controller determines whether there is enough space in the first physical block to write the specific physical pages,
- when there is enough space in the first physical block to write the specific physical pages, valid data of the specific physical pages and data to be updated are written into the first physical block.
Dependencies are inferred from the claim text.