Programmable Via Devices in Back End of Line Level

A method of fabricating a programmable via device over a device layer of a semiconductor chip, the method comprising the steps of:

• depositing a first dielectric layer on the device layer;
• depositing a first isolation layer over a side of the first dielectric layer opposite the device layer;
• forming a heater on a side of the first isolation layer opposite the first dielectric layer;
• depositing a second isolation layer over the side of the first isolation layer opposite the first dielectric layer so as to cover the heater;
• forming a first conductive via and a second conductive via each extending through the second isolation layer and in contact with the heater;
• depositing a capping layer over a side of the second isolation layer opposite the first isolation layer;
• forming at least one programmable via extending through the capping layer and the second isolation layer and in contact with the heater, the programmable via comprising at least one phase change material;
• forming a conductive cap over the programmable via;
• depositing a second dielectric layer over a side of the capping layer opposite the second isolation layer;
• extending each of the first conductive via and the second conductive via through the capping layer and through the second dielectric layer;
• and
• forming a third conductive via extending through the second dielectric layer and in contact with the conductive cap.