US 2011/0216818 A1 · VARIABLE DUTY CYCLE GENERATION FOR OUT-PHASING AND PWM POWER AMPLIFIERS

Abstract

Power reduction in transmitters is very important. One method to realize reduction is to make use of switching power amplifiers (PA) that have a better efficiency. Switching PA concepts are only possible in combination with suitable modulation methods like pulse width modulation (PWM) and out-phasing concepts. However, PWM and out-phasing concepts rely on accurate phase control and duty cycle of the signals. Digitally generation of signals of variable duty cycles and phase is proposed without sacrificing their accuracy. Accordingly, a out-phasing power amplifier arrangement is disclosed, where the generation of the out-phasing angle (θ) and duty cycles (d1 and d2) are controlled by a set of n-bit digital input words (D1, D2, D3, D4). The baseband phase information (φ(t)) is phase modulated back to radio frequency and used as the clock signal of digital circuitry for phase and duty cycle generation after being frequency multiplied by 2n−1. The resolution of the out-phasing angle and of the duty cycle is 2π/2n and 2π/2n−1 equivalently. The resolution of the phase information φ is dependent on the PM realization.

Claims10

Dependent claims

Method for driving a RF out-phasing power amplifier circuit arrangement for amplification of RF input signals with modulated amplitude and modulated phase, wherein the circuit includes first and second amplification branches each having an input and an output, for amplifying one of a first and a second out-phased signal being only phase modulated and having respective duty-cycles, a combination of the out-phased signals corresponding to the RF input signal;

wherein in each of the first and second amplification branches, respective first and second amplification devices are operative in a switching operation mode;
wherein the method comprises:
generating based on the amplitude information of the RF input signal a digital control signal;
phase modulating a clock signal in accordance with the phase information of the RF input signal;
frequency multiplying the clock signal by a predetermined binary factor;
creating at least two copies of the phase modulated clock signal including a phase shift with respect to each other in accordance with the digital control signal for producing of one of the first and second out-phased signals;
controlling by means of the digital control signal selective swallowing of pulses in each copy of the clock signal during a division operation compensating the frequency multiplying step thus a determined delay in the clock signal is effected corresponding to the amplitude information of the RF input signal;
and
multiplying the two copies of the clock signal to produce of one of the first and second out-phased signals.

6 more elements

RF power amplifier circuit arrangement for amplification of RF input signals with modulated amplitude and modulated phase, wherein the circuit arrangement comprises:

first and second amplification branches each having an input and an output, for amplifying one of a first and a second out-phased signal being only phase modulated and having respective duty-cycles, a combination of the out-phased signals corresponding to the RF input signal;
wherein in each of the first and second amplification branches, respective first and second amplification devices are operative in a switching operation mode;
wherein a combination circuit is configured to combine the outputs of the first and second amplification branches such that the circuit arrangement is operative as an out-phasing amplifier arrangement;
and
a phase modulating unit configured to provide a digital clock signal, which is phase modulated in accordance with the phase information of the RF input signal, and to up-convert the basic frequency of the clock signal by a predetermined binary factor;
an out-phasing signals generation unit receiving the up-converted clock signal and a digital control signal and configured
to create at least two copies of the phase modulated clock signal with a selected phase shift in accordance with the digital control signal as basic signals for a respective one of the first and second out-phasing signal;
to selectively swallow pulses in each copy of the clock signal in accordance with the digital control signal during a division operation for down-converting the frequency by the predetermined binary factor so that a determined delay in each copy of the clock signal is effected;
and
to multiply the two copies of the clock signal to produce of one of the first and second out-phased signals.

7 more elements

Dependencies are inferred from the claim text.

Variable duty cycle generation for out-phasing and pwm power amplifiers

Life of this patent

Variable duty cycle generation for out-phasing and pwm power amplifiers

Life of this patent

Abstract

Claims10