Voltage compensated tracking circuit in sram
AssigneeTexas Instruments Incorporated
InventorsRavi Shankar Prasad, Parvinder Kumar Rana
Life of this patent
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Abstract
Supply voltage compensated tracking circuit in a split-rail static random access memory (SRAM). The circuit includes a tracking circuit for tracking a delay required for generating sense amplifier enable (SE) signal in a memory. The tracking circuit receives an array supply voltage (VDDAR) and a periphery supply voltage (VDDPR). Further, the circuit includes a discharge control circuit, operatively coupled to the tracking circuit, for increasing delay in activating a first transistor of the tracking circuit when VDDAR is higher than VDDPR; and a contention circuit including an output coupled to the first transistor, for delaying a discharge path activation through the first transistor when VDDAR is lower than the VDDPR.
Claims19
A circuit comprising:
- a supply tracking circuit for tracking a delay required for generating sense amplifier enable signal in a memory, the supply tracking circuit receiving an array supply voltage and a periphery supply voltage;
- a discharge control circuit, operatively coupled to the supply tracking circuit, for increasing delay in activating a first transistor of the supply tracking circuit when the array supply voltage is higher than the periphery supply voltage;
- and
- a contention circuit comprising an output coupled to the first transistor, for delaying discharge path activation through the first transistor when the array supply voltage is lower than the periphery supply voltage.
A discharge control circuit in a split-rail static random access memory comprising:
- a plurality of inverters for increasing delay in activating a transistor of a tracking circuit according to a relative difference between an array supply voltage and a periphery supply voltage;
- and
- a contention circuit that generates a delay in activating a discharge path through the transistor of the tracking circuit when the array supply voltage is lower than the periphery supply voltage, the contention circuit comprising a first transistor, a second transistor, a third transistor, and a fourth transistor coupled to each other;
- wherein a low array supply voltage activates the third transistor that creates a contention between the contention circuit and the plurality of inverters.
A method comprising:
- determining a relative difference between an array supply voltage and a periphery supply voltage in a memory;
- and
- generating a delay that activates a discharge path of a tracking circuit in the memory according to the relative difference.
Dependencies are inferred from the claim text.