US 2011/0216602 A1 · FLASH MEMORY DEVICES WITH SELECTIVE BIT LINE DISCHARGE PATHS AND METHODS OF OPERATING THE SAME

Abstract

Provided is a flash memory device that can include a memory cell configured to store data, a local bit line that is connected to the memory cell, a global bit line that is connected to the local bit line, a discharge transistor that is connected to the global bit line, and that is configured to selectively connect the global bit line to a reference level responsive to a discharge control signal, and a discharge control circuit, that is connected to the discharge transistor via the discharge control signal, and that is configured to selectively disable the discharge transistor during an erase interval occurring before a verify interval of an erase verification operation carried out by the flash memory device.

Claims16

Dependent claims

A flash memory device, comprising:

a memory cell configured to store data;
a local bit line connected to the memory cell;
a global bit line connected to the local bit line;
a discharge transistor connected to the global bit line, and configured to selectively connect the global bit line to a reference level responsive to a discharge control signal;
and
a discharge control circuit, connected to the discharge transistor via the discharge control signal, and configured to selectively disable the discharge transistor during an erase interval occurring before a verify interval of an erase verification operation carried out by the flash memory device.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/813,050Filed 10 Jun 2010

Priority

KR 10-2010-00186582 Mar 2010

Published

8 Sep 2011

Term ends

Not estimatedThe source records don’t support an estimate.

Classification12 codes

G11C 16/06
Electrically programmable: auxiliary circuits, e.g. for writing into memory
G11C 16/0483
Using variable threshold transistors, e.g. FAMOS: comprising cells having several storage transistors connected in series
G11C 16/08
Auxiliary circuits, e.g. for writing into memory: address circuits; Decoders; Word-line control circuits
G11C 16/14
Programming or data input circuits: circuits for erasing electrically, e.g. erase voltage switching circuits

Flash memory devices with selective bit line discharge paths and methods of operating the same

Life of this patent

Flash memory devices with selective bit line discharge paths and methods of operating the same

Life of this patent

Abstract

Claims16