Drain select gate voltage management

An apparatus, comprising:

• an array of memory cells;
• a determination module to determine a number of programming pulses applied to a subset of the array of memory cells during a single programming cycle;
• and
• an adjustment module to adjust a drain select gate voltage value associated with the array of memory cells responsive to the number of programming pulses.

An apparatus, comprising:

• an array of memory cells;
• a determination module to determine a number of cells within the array of memory cells that have not been programmed to a selected level;
• and
• an adjustment module to adjust a drain select gate voltage value associated with the array of memory cells responsive to the number of cells, wherein the drain select gate voltage is adjusted between programming pulses of a programming cycle associated with the array.

A method, comprising:

• counting a number of programming pulses applied to a plurality of memory cells during a single programming cycle while a drain select gate voltage value associated with the plurality of memory cells is applied;
• adjusting the drain select gate voltage value to an adjusted select gate voltage value after the number of programming pulses has reached a selected number less than a maximum number;
• and
• continuing to apply the programming pulses to the plurality of memory cells in conjunction with applying the adjusted select gate voltage value until the number of programming pulses reaches the maximum number during the single programming cycle.

A method, comprising:

• counting a number of incompletely-programmed cells in a plurality of memory cells while a drain select gate voltage value associated with the plurality of memory cells is applied during programming the plurality of memory cells as part of a single programming cycle;
• adjusting the drain select gate voltage value to an adjusted select gate voltage value after verifying that the number of incompletely-programmed cells has reached a selected number of cells that have not been programmed to a selected level of multiple programming levels;
• and
• continuing the programming in conjunction with applying the adjusted select gate voltage value as part of the single programming cycle.