Semiconductor device
AssigneeHitachi, Ltd.
InventorsSatoru HANZAWA, Hitoshi Kume
Life of this patent
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Abstract
A phase change memory capable of highly reliable operations is provided. A semiconductor device has a memory array having a structure in which memory cells are stacked including memory layers using a chalcogenide material and diodes, and initialization conditions and write conditions are changed according to the layer in which a selected memory cell is positioned. The initialization conditions and write conditions (herein, reset conditions) are changed according to the operation by selecting a current mirror circuit according to the operation and by a control mechanism of a reset current in a voltage select circuit and the current mirror circuit.
Claims4
1-22. (canceled)
A semiconductor device comprising:
- a plurality of memory cells each including a memory element which has a first state and a second state;
- and
- a word driver supplying a first pulse which causes the memory element to be in the second state,
- wherein a resistance of the memory element in the second state is higher than a resistance of the memory element in the first state,
- wherein the plurality of memory cells are stacked upon each other, and
- wherein the word driver supplies to one of said memory cells the first pulse with a larger pulse width than a pulse width of other said first pulses, said one memory cell which receives said larger pulse width first pulse to be below at least one other of said memory cells in said memory cell stack.
Dependencies are inferred from the claim text.