Mram-based memory device with rotated gate

Method of writing a memory device comprising:

• a plurality of magnetoresistive random access memory (MRAM) cells arranged in rows and columns, each MRAM cell comprising a magnetic tunnel junction and a select transistor, one end of the magnetic tunnel junction being electrically coupled to the source of the select transistor;
• a plurality of word lines, each word line connecting MRAM cells along a row via the gate of their select transistor;
• a plurality of bit lines, each bit line connecting MRAM cells along a column, each bit line connecting the MRAM cells via the drain of their select transistor;
• a plurality of source lines, each source line connecting MRAM cells along a row via the other end of the magnetic tunnel junction;
• the method comprising:
• selectively writing one of the TAS-MRAM cells by applying a word write bias voltage and a source write bias voltage, respectively to the word line and source line connected to the selected TAS-MRAM cells, and grounding the bit line connected to the selected TAS-MRAM cells;
• and
• unselecting TAS-MRAM cells being in the same row as the TAS-MRAM cell being selectively written by applying via the corresponding bit line a bit bias voltage having a value corresponding substantially to the word write bias voltage, and unselecting other TAS-MRAM cells by grounding the corresponding word lines.

Method of reading a memory device comprising:

• a plurality of magnetoresistive random access memory (MRAM) cells arranged in rows and columns, each MRAM cell comprising a magnetic tunnel junction and a select transistor, one end of the magnetic tunnel junction being electrically coupled to the source of the select transistor;
• a plurality of word lines, each word line connecting MRAM cells along a row via the gate of their select transistor;
• a plurality of bit lines, each bit line connecting MRAM cells along a column, each bit line connecting the MRAM cells via the drain of their select transistor;
• a plurality of source lines, each source line connecting MRAM cells along a row via the other end of the magnetic tunnel junction;
• the method comprising:
• selectively reading one of the TAS-MRAM cells by applying a word read bias voltage via the word line to the gate of the select transistor connected to the selected TAS-MRAM cells, and applying a bit read bias voltage and a source read bias voltage to the bit line and source line addressing the selected TAS-MRAM cell;
• and
• unselecting TAS-MRAM cells being in the same row as the TAS-MRAM cell being selectively read by applying, via the corresponding bit lines, a bit bias voltage having a value corresponding to the source read bias voltage, and unselecting other TAS-MRAM cells by grounding the corresponding word lines.