Signal processing device, signal processing method, integrated circuit for signal processing, and television receiver

A signal processing method to be used by a signal processing device including a first reconfigurable circuit and a second reconfigurable circuit, a logic configuration of each reconfigurable circuit being alterable, and the reconfigurable circuits being sequentially reconfigured so that the signal processing device conducts processes relating to signals transmitted to and from a connected external device, the signal processing device further including memory for storing first configuration information and second configuration information to be used for reconfiguring the first and second reconfigurable circuits,

• the signal processing method comprising a control step in which:
• at a first temporal point that is after completion of reconfiguration of the first reconfigurable circuit based on the first configuration information and before completion of reconfiguration of the second reconfigurable circuit based on the second reconfigurable circuit, a signal transmission path is formed between an external interface connected to the external device and an internal interface connected to an internal device, with the first reconfigurable circuit inserted into the signal transmission path;
• and
• at a second temporal point that is after completion of the reconfiguration of the second reconfigurable circuit, the signal transmission path is altered to insert the second configurable circuit between the first reconfigurable circuit and the internal interface.

An integrated circuit for signal processing, the integrated circuit including a first reconfigurable circuit and a second reconfigurable circuit, a logic configuration of each reconfigurable circuit being alterable, and the reconfigurable circuits being sequentially reconfigured so that the integrated circuit conducts processes relating to signals transmitted to and from a connected external device, the integrated circuit comprising:

• memory operable to store first configuration information and second configuration information to be used for reconfiguring the first and second reconfigurable circuits;
• and
• a control unit operable to perform such control that:
• at a first temporal point that is after completion of reconfiguration of the first reconfigurable circuit based on the first configuration information and before completion of reconfiguration of the second reconfigurable circuit based on the second reconfigurable circuit, a signal transmission path is formed between an external interface connected to the external device and an internal interface connected to an internal device, with the first reconfigurable circuit inserted into the signal transmission path;
• and
• at a second temporal point that is after completion of the reconfiguration of the second reconfigurable circuit, the signal transmission path is altered to insert the second configurable circuit between the first reconfigurable circuit and the internal interface.

A television receiver including a display, a first reconfigurable circuit and a second reconfigurable circuit, a logic configuration of each reconfigurable circuit being alterable, and the reconfigurable circuits being sequentially reconfigured so that the television receiver conducts processes relating to broadcast signals to be output to the display, the television receiver comprising:

• memory operable to store first configuration information and second configuration information to be used for reconfiguring the first and second reconfigurable circuits;
• and
• a control unit operable to perform such control that:
• at a first temporal point that is after completion of reconfiguration of the first reconfigurable circuit based on the first configuration information and before completion of reconfiguration of the second reconfigurable circuit based on the second reconfigurable circuit, a signal transmission path is formed between an external interface connected to the display and an internal interface connected to an internal device for conducting a process related to received broadcast signals, with the first reconfigurable circuit inserted into the signal transmission path;
• and
• at a second temporal point that is after completion of the reconfiguration of the second reconfigurable circuit, the signal transmission path is altered to insert the second configurable circuit between the first reconfigurable circuit and the internal interface.