Charge pump for phase locked loop

A charge pump for a self-biased phase locked loop (PLL), comprising:

• a charge pump core circuit having a first current source transistor, a second current source transistor, and an output terminal;
• a replica bias circuit having a first reference current source transistor, a second reference current source transistor, and a reference node corresponding to the output terminal of the charge pump core circuit, wherein the reference node is connected to gates of the second current source transistor and the second reference current source transistor;
• and
• a differential amplifier circuit having a first input connected to the output terminal of the charge pump core circuit, a second input connected to the reference node of the replica bias circuit, and an output connected to gates of the first current source transistor and the first reference current source transistor, wherein a load of the differential amplifier circuit is configured in a cascode current mirror configuration.