Programmable on-chip logic analyzer apparatus, systems, and methods
AssigneeMicron Technology, Inc.
InventorsKirsten S. Lunzer, Jeffrey J. Rooney
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Abstract
Apparatus, systems, and methods disclosed herein may cause an event trigger state machine associated with a programmable on-chip logic analyzer (POCLA) to transition to a programmable state at a programmable number of occurrences of a programmable set of events associated with a first subset of signals on a first subset of input signal paths. States associated with a second subset of signals on a second subset of input signal paths may be stored at a time relative to a transition to the programmable state if a set of storage criteria have been met. Additional embodiments are disclosed and claimed.
Claims20
A method comprising:
- selecting a first plurality of initial input signals from a set of input signals;
- selecting a second plurality of initial input signals from the set of input signals;
- performing a first selectable logic function on at least one of the first plurality of initial input signals using a first programmable logic module to yield a first intermediate result,
- performing a second selectable logic function on at least one of the second plurality of initial input signals using a second programmable logic macro module to yield a second intermediate result;
- performing a third selectable logic function on at least one of the first or second intermediate results using a third programmable logic macro module to yield a third intermediate result;
- and
- performing a fourth selectable logic function on at least one of (a) the third intermediate result or (b) at least one of the second plurality of initial input signals to yield an event function result.
An apparatus comprising:
- an input signal selection macro module (ISSMM) stage to perform at least one of selecting a subset of signals from a device under test or introducing at least one differential delay between ones of the subset of signals;
- a programmable logic macro module (PLMM) stage to perform a set of selectable logic functions on the subset of signals;
- and
- an event function result output to indicate that the subset of signals as acted upon by the ISSMM stage has transitioned to a watched-for state as identified by a configuration programmed into the PLMM stage.
A method comprising:
- selecting a first plurality of initial input signals from a set of input signals on a set of input signal paths using a first plurality of input signal selection macro modules;
- selecting a second plurality of initial input signals from the set of input signals on the set of input signal paths using a second plurality of input signal selection macro modules;
- performing a first selectable logic function on at least one of the first plurality of initial input signals using a first programmable logic module to yield a first intermediate result,
- performing a second selectable logic function on at least one of the second plurality of initial input signals using a second programmable logic macro module to yield a second intermediate result;
- performing a third selectable logic function on at least one of the first or second intermediate results using a third programmable logic macro module to yield a third intermediate result;
- and
- performing a fourth selectable logic function on at least one of (a) the third intermediate result or (b) at least one of the second plurality of initial input signals to yield an event function result.
Dependencies are inferred from the claim text.