Output buffer circuit and differential output buffer circuit, and transmission method

A transmission method utilizing an output buffer circuit including one or more inverters, a delay circuit for delaying an input signal for a specific time, one or more buffers, means for transmitting a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creating at a transmission side a waveform including four or more kinds of signal voltages, and a selector circuit situated before the buffer, the transmission method comprising the steps of:

• inverting a data signal, the inverter being capable of selecting through selector logic a signal to be inputted to the buffer and inverting;
• and
• adjusting a preemphasis amount and the number of preemphasis taps through a selection signal for the selector logic, thereby making the preemphasis amount variable.

A transmission method utilizing an output buffer circuit including one or more inverters, a delay circuit for delaying an input signal for a specific time, one or more buffers, means for transmitting a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creating at a transmission side a waveform including four or more kinds of signal voltages, and switches, the transmission method comprising the steps of:

• controlling the number of the buffers that concurrently turn ON, by respective switches provided in series with output resistors of the buffers, two or more of the buffers being redundantly connected in parallel with one another;
• and
• adjusting a preemphasis amount and the number of preemphasis taps, by selecting the buffers in which the respective switches are turned ON, thereby making the preemphasis amount variable.