Integrated circuits including air gaps around interconnect structures, and fabrication methods thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChii-Ping CHEN, Chih-Hao CHEN
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Abstract
An integrated circuit includes an interconnect structure at least partially disposed in at least one opening of a dielectric layer that is disposed over a substrate. At least one air gap is disposed between the dielectric layer and the interconnect structure. At least one first liner material is disposed under the at least one air gap. At least one second liner material is disposed around the interconnect structure. The at least one first liner material is disposed between the dielectric layer and at least one second liner material.
Claims19
An integrated circuit comprising:
- an interconnect structure disposed at least partially in at least one opening of a dielectric layer that is disposed over a substrate;
- at least one air gap disposed between the dielectric layer and the interconnect structure;
- at least one first liner material disposed under the at least one air gap;
- and
- at least one second liner material disposed around the interconnect structure, wherein the at least one first liner material is disposed between the dielectric layer and at least one second liner material.
An integrated circuit comprising:
- a carbon-containing low-k dielectric layer disposed over a substrate, the carbon-containing low-k dielectric layer comprising at least one opening;
- a damascene structure disposed at least partially in the at least one opening, wherein the damascene structure comprises a metallic line and a via region;
- at least one air gap disposed between the carbon-containing low-k dielectric layer and the damascene structure;
- at least one first liner material disposed below the at least one air gap;
- and
- at least one second liner material disposed around the damascene structure, wherein the first liner material is disposed between the carbon-containing low-k dielectric layer and the at least one second liner material.
A method of forming an integrated circuit, the method comprising:
- forming an interconnect structure in at least one opening of a dielectric layer that is disposed over a substrate;
- and
- forming at least one air gap between the dielectric layer and the interconnect structure, wherein the at least one air gap is formed over at least one first liner material, at least one second liner material is formed around the interconnect structure, and the at least one first liner material is formed between the dielectric layer and the at least one second liner material.
Dependencies are inferred from the claim text.