Method for forming a double embossing structure

A chip comprising:

• a silicon substrate;
• a first coil over said silicon substrate;
• a dielectric layer over said first coil and said silicon substrate;
• and
• a second coil over said dielectric layer, wherein said second coil is vertically over said first coil and connected to said first coil.

A chip comprising:

• a substrate;
• a first dielectric layer over said substrate;
• a patterned circuit layer on said first dielectric layer and over said substrate;
• a second dielectric layer on said patterned circuit layer and on said first dielectric layer, wherein said patterned circuit layer has a contact point and left and right regions not covered by said second dielectric layer, wherein said contact point is between said left and right regions;
• and
• a metal bump on said contact point, wherein said metal bump comprises a copper layer, wherein said metal bump has a left sidewall horizontally spaced apart from a left portion of said second dielectric layer, and said left region is between said left sidewall and said left portion, wherein said metal bump has a right sidewall horizontally spaced apart from a right portion of said second dielectric layer, and said right region is between said right sidewall and said right portion, wherein said second dielectric layer has no portion between said left sidewall and said left portion and between said right sidewall and said right portion.