Cascode cmos structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsFu-Lung HSUEH, Chih-Ping Chao, Chewn-Pu Jou, Yung-Chow Peng, Harry-Hak-Lay Chuang, Kuo-Tung Sung
Life of this patent
Estimating the term…
Abstract
A MOS device includes an active area having first and second contacts. First and second gates are disposed between the first and second contacts. The first gate is disposed adjacent to the first contact and has a third contact. The second gate is disposed adjacent to the second contact and has a fourth contact coupled to the third contact. A transistor defined by the active area and the first gate has a first threshold voltage, and a transistor defined by the active area and the second gate has a second threshold voltage.
Claims20
A MOS device, comprising:
- an active area including first and second contacts;
- and
- first and second gates disposed between the first and second contacts, the first gate disposed adjacent to the first contact and having a third contact, the second gate disposed adjacent to the second contact and having a fourth contact coupled to the third contact,
- wherein a transistor defined by the active area and the first gate has a first threshold voltage, and a transistor defined by the active area and the second gate has a second threshold voltage.
A method, comprising:
- a) providing an initial model of a MOS device, the MOS device comprising a gate including a gate contact disposed over an active area including first and second contacts;
- b) creating a final model of the MOS device based on the initial model such that in the final model the MOS device includes a plurality of fingers each having a respective gate contact, each of the fingers respectively defining a transistor with the active area, a first one of the transistors having a first threshold voltage and a second one of the transistors having a second threshold voltage;
- and
- c) storing the final model of the MOS device in a computer readable storage medium.
A MOS device, comprising:
- an active area including a source contact disposed at a distance from a drain contact;
- a first gate region formed over the active area and disposed between the source and drain contacts, the first gate region defining a first transistor with the source and drain contacts, the first transistor having a first threshold voltage;
- and
- a second gate region formed over the active area and disposed between the source and drain contacts, the second gate region defining a second transistor with the source and drain contacts, the second transistor having a second threshold voltage,
- wherein the first and second gate regions include respective gate contacts that are coupled together to form a gate of the MOS device.
Dependencies are inferred from the claim text.