P-channel power mosfet
AssigneeRenesas Electronics Corporation
InventorsHitoshi MATSUURA, Yoshito Nakazawa
Life of this patent
Estimating the term…
Abstract
In characteristic test measurements of double-gate-in-trench p-channel power MOSFETs each having a p+ polysilicon gate electrode and a p+ field plate electrode in a trench, which were fabricated according to common design techniques, it has been found that, under conditions where a negative gate bias is applied continuously at high temperature with respect to the substrate, an absolute value of threshold voltage tends to increase steeply after the lapse of a certain period of stress application time. To solve this problem, the present invention provides a p-channel power MOSFET having an n-type polysilicon linear field plate electrode and an n-type polysilicon linear gate electrode in each trench part thereof.
Claims18
A p-channel power MOSFET comprising:
- (a) a silicon-based semiconductor substrate having first and second principal surface sides;
- and
- (b) a multiplicity of linear trenches disposed in the first principal surface side;
- wherein each of the linear trenches includes:
- (b1) an n-type polysilicon linear field plate electrode;
- and
- (b2) an n-type polysilicon linear gate electrode disposed over and along the n-type polysilicon linear field plate electrode.
A p-channel power MOSFET comprising:
- (a) a silicon-based semiconductor substrate having first and second principal surface sides;
- and
- (b) a multiplicity of linear trenches disposed in the first principal surface side;
- wherein each of the linear trenches includes:
- (b1) an n-type polysilicon linear field plate electrode;
- and
- (b2) a p-type polysilicon linear gate electrode disposed over and along the n-type polysilicon linear field plate electrode.
Dependencies are inferred from the claim text.