High cell density trenched power semiconductor structure and fabrication method thereof
AssigneeGreat Power Semiconductor Corp.
InventorHSIU WEN HSU
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Abstract
The fabrication method of a high cell density trenched power semiconductor structure is provided. The fabrication method comprises the steps of: a) forming at least a gate trench in a substrate with a silicon oxide patterned layer formed thereon, said silicon oxide patterned layer having at least an open aligned to the gate trench; b) forming a polysilicon gate in the gate trench; c) forming a dielectric structure in the open, the dielectric structure has a sidewall thereof being lined with an etching protection layer; d) removing the silicon oxide patterned layer by selective etching; and e) forming a spacer on a side surface of the dielectric structure to define at least a contact window.
Claims17
A fabrication method of a high cell density trenched power semiconductor structure comprising the steps of:
- forming at least a gate trench in a substrate with a silicon oxide patterned layer formed thereon, said silicon oxide patterned layer having at least an open aligned to the gate trench;
- forming a polysilicon gate in the gate trench;
- forming a dielectric structure in the open, the dielectric structure having a sidewall thereof being lined with an etching protection layer;
- removing the silicon oxide patterned layer by selective etching;
- and
- forming a spacer on a side surface of the dielectric structure to define at least a contact window.
The high cell density trenched power semiconductor structure comprises:
- a silicon substrate;
- a gate trench located in the silicon substrate;
- a polysilicon gate located in the gate trench;
- a body located in the silicon substrate and surrounding the gate trench;
- a source region located in the body;
- a dielectric structure located above the polysilicon gate and protruded from the gate trench, a maximum width of the dielectric structure being smaller than that of the gate trench;
- and
- a spacer located on a side surface of the dielectric structure for defining at least a contact window to expose the source region.
Dependencies are inferred from the claim text.