Power semiconductor device having adjustable output capacitance and manufacturing method thereof

A manufacturing method of a power semiconductor device having an adjustable output capacitance, comprising:

• providing a semiconductor substrate, the semiconductor substrate having a top surface and a bottom surface, and the top surface of the semiconductor substrate having a first device region and a second device region defined thereon;
• covering the semiconductor substrate in the second device region with a field oxide layer, and exposing the semiconductor substrate in the first device region;
• forming at least one first doped base region, a second doped base region, at least one trench, an insulating layer, a gate conductive layer and at least one doped source region in the exposed semiconductor substrate, wherein the doped source region has a first conductive type, and the first doped base region and the second doped base region have a second conductive type;
• forming an ILD layer on the semiconductor substrate and the field oxide layer;
• performing a photolithographic process and an etching process to remove the field oxide layer and the ILD layer in the second device region and to expose the semiconductor substrate in the second device region;
• performing an ion implantation process and a drive-in process to form a heavily doped region having the second conductive type in the exposed semiconductor substrate;
• forming a capacitor dielectric layer on the top surface of the semiconductor substrate in the second device region;
• forming a source metal layer on the top surface of the semiconductor substrate;
• and
• forming a drain metal layer on the bottom surface of the semiconductor substrate.