Semiconductor device and method for manufacturing semiconductor device

A semiconductor device comprising:

• a first insulating layer over a substrate;
• a source electrode and a drain electrode over the substrate;
• an oxide semiconductor layer over and in contact with the first insulating layer, the source electrode, and the drain electrode;
• a second insulating layer over the oxide semiconductor layer;
• and
• a gate electrode over the second insulating layer,
• wherein an upper surface of the first insulating layer, an upper surface of the source electrode, and an upper surface of the drain electrode exist coplanarly.

A semiconductor device comprising:

• a first transistor;
• and
• a second transistor over the first transistor,
• wherein the first transistor comprises:
• a first channel formation region;
• a first gate insulating layer over the first channel formation region;
• a first gate electrode over the first gate insulating layer so as to overlap with the first channel formation region;
• and
• a first source electrode and a first drain electrode electrically connected to the first channel formation region,
• wherein the second transistor comprises:
• an insulating layer;
• a second source electrode and a second drain electrode wherein one of the second source electrode and the second drain electrode is electrically connected to the first gate electrode;
• an oxide semiconductor layer over the insulating layer, the second source electrode, and the second drain electrode;
• a second gate insulating layer over the oxide semiconductor layer;
• and
• a second gate electrode over the second gate insulating layer, and
• wherein an upper surface of the insulating layer, an upper surface of the second source electrode, and an upper surface of the second drain electrode exist coplanarly.

A method for manufacturing a semiconductor device, the method comprising the steps of:

• forming a source electrode and a drain electrode over a substrate;
• forming an insulating layer so as to cover the source electrode and the drain electrode;
• performing planarization treatment on the insulating layer so that an upper surface of the insulating layer, an upper surface of the source electrode, and an upper surface of the drain electrode exist coplanarly;
• forming an oxide semiconductor layer over and in contact with the insulating layer, the source electrode, and the drain electrode;
• forming a gate insulating layer over the oxide semiconductor layer;
• and
• forming a gate electrode over the gate insulating layer.

A method for manufacturing a semiconductor device, the method comprising the steps of:

• forming a first transistor, the first transistor comprising:
• a first channel formation region;
• a first gate insulating layer over the first channel formation region;
• a first gate electrode over the first gate insulating layer so as to overlap with the first channel formation region;
• and
• a first source electrode and a first drain electrode electrically connected to the first channel formation region;
• forming a second source electrode and a second drain electrode over the first source electrode and the first drain electrode so that one of the second source electrode and the second drain electrode is electrically connected to the first gate electrode;
• forming an insulating layer so as to cover the second source electrode and the second drain electrode;
• performing planarization treatment on the insulating layer so that an upper surface of the insulating layer, an upper surface of the second source electrode, and an upper surface of the second drain electrode exist coplanarly;
• forming an oxide semiconductor layer over and in contact with the insulating layer, the second source electrode, and the second drain electrode;
• forming a gate insulating layer over the oxide semiconductor layer;
• and
• forming a gate electrode over the gate insulating layer.