A driving method of a semiconductor device comprising a plurality of pixels arranged in a matrix, each of the plurality of pixels comprising a photodiode, a signal charge accumulation portion, a charge accumulation control transistor, a reset transistor, an amplifying transistor, and a selection transistor, wherein one of a source and a drain of the charge accumulation control transistor is electrically connected to the photodiode, the other of the source and the drain of the charge accumulation control transistor is electrically connected to the signal charge accumulation portion, one of a source and a drain of the reset transistor is electrically connected to the signal charge accumulation portion, a gate of the amplifying transistor is electrically connected to the signal charge accumulation portion, and one of a source and a drain of the selection transistor is electrically connected to one of a source and a drain of the amplifying transistor, comprising the steps of:
- turning on the charge accumulation control transistors in the plurality of pixels simultaneously;
- turning on the reset transistors in the plurality of pixels simultaneously, and setting a potential of the signal charge accumulation portion in each of the plurality of pixels to a reset potential;
- turning off the reset transistors in the plurality of pixels simultaneously, and changing the potential of the signal charge accumulation portion in each of the plurality of pixels;
- turning off the charge accumulation control transistors in the plurality of pixels simultaneously, and holding the potential of the signal charge accumulation portion in each of the plurality of pixels;
- and
- turning on the selection transistors per row sequentially, and outputting a signal corresponding to the potential of the signal charge accumulation portion in each of the plurality of pixels from the amplifying transistor in each of the plurality of pixels,
- wherein a channel formation region of at least one of the charge accumulation control transistor and the reset transistor comprises an oxide semiconductor.