Method of storing data on a flash memory device
AssigneeMicron Technology, Inc.
InventorJin-Man Han
Life of this patent
Estimating the term…
Abstract
Methods and apparatus are disclosed, such as those involving a flash memory device. One such method includes storing data on memory cells on a memory block including a plurality of word lines and a plurality of memory cells on the word lines. The word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines. The data is stored first on memory cells on the intermediate word lines. Then, a remaining portion, if any, of the data is stored on memory cells on the bottom edge word lines and/or the top edge word lines. This method enhances the life of the flash memory by preventing a premature failure of memory cells on the bottom or top edge word lines, which can be more prone to failure.
Claims20
A method of arranging data within a block of a flash memory device, wherein the block comprises a plurality of word lines and a plurality of memory cells of the word lines, the word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines between the bottom and top edge word lines, the method comprising:
- writing at least a portion of data to memory cells of the intermediate word lines first;
- and
- after writing the at least a portion of the data to the memory cells of the intermediate word line, writing a remainder of the data to memory cells of the top and/or bottom edge word lines.
A flash memory device comprising:
- one or more memory blocks, each of the memory blocks including a plurality of word lines having a plurality of memory cells, the word lines extending parallel to one another in a direction, the word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines interposed between the bottom and top edge word lines;
- and
- an address decoder configured to write at least a portion of data to memory cells of the intermediate word lines first,
- wherein the address decoder is further configured to write a remainder of the data to memory cells of the fop and/or bottom edge word lines after writing the at least a portion of the data to the memory cells of the intermediate word line.
A computer system comprising:
- a controller;
- and
- a flash memory device configured to receive addresses for storing data therein, the flash memory device comprising one or more memory blocks, each of the memory blocks including a plurality of word lines and a plurality of memory cells of the word lines, the word lines extending parallel to one another in a direction, the word lines comprising one or more bottom edge word lines, one or more top edge word lines, and intermediate word lines interposed between the bottom and top edge word lines,
- wherein the controller is configured to generate the addresses such that at least a portion of data is written to memory cells of the intermediate word lines first, and such that a remainder of the data is written to memory cells of the top and/or bottom edge word lines after the at least a portion of the data is written to the memory cells of the intermediate word line.
Dependencies are inferred from the claim text.