CMP Process Flow for MEMS
AssigneeCavendish Kinetics, Inc.
InventorsJoseph Damian Gordon Lacey, Thomas L. Maguire, Vikram Joshi, Dennis J. Yost
Life of this patent
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Abstract
The present invention generally relates to the formation of a micro-electromechanical system (MEMS) cantilever switch in a complementary metal oxide semiconductor (CMOS) back end of the line (BEOL) process. The cantilever switch is formed in electrical communication with a lower electrode in the structure. The lower electrode may be either blanket deposited and patterned or simply deposited in vias or trenches of the underlying structure. The excess material used for the lower electrode is then planarized by chemical mechanical polishing or planarization (CMP). The cantilever switch is then formed over the planarized lower electrode.
Claims20
A method, comprising:
- depositing one or more electrically conductive layers over a substrate, the substrate having a first dielectric layer with vias extending therethrough to underlying interconnect structures;
- patterning the one or more electrically conductive layers to expose at least a portion of the first dielectric layer;
- depositing a second dielectric layer over the patterned one or more electrically conductive layers and the exposed first dielectric layer;
- chemical mechanical polishing the second dielectric layer and at least a portion of the patterned electrically conductive layers to create polished electrodes;
- encapsulating the first dielectric layer and the polished electrodes;
- and
- forming a cantilever device that is in electrical contact with at least a portion of the polished electrodes.
A method, comprising:
- forming a plurality of vias through a dielectric layer formed above a substrate to expose one or more interconnect elements;
- modifying one or more vias of the plurality of vias to form one or more trenches;
- depositing one or more electrically conductive layers over the dielectric layer, over the exposed one or more interconnect elements, and within both the plurality of vias and the one or more trenches;
- chemical mechanical polishing the one or more electrically conductive layers to expose at least a portion of the dielectric layer and to form MEMS electrodes;
- encapsulating the dielectric layer and the MEMS electrodes;
- and
- forming a cantilever device that is in electrical contact with at least one of the MEMS electrodes.
A method, comprising:
- forming one or more vias thorough a first dielectric layer to expose one or more interconnect elements;
- forming one or more trenches within the first dielectric layer such that the one or more trenches and one or more vias are connected;
- depositing one or more electrically conductive layers within the one or more vias with a first material, the one or more trenches, and over the first dielectric layer;
- chemical mechanical polishing the one or more electrically conductive layers to expose the first dielectric layer and to form one or more MEMS electrodes within the one or more trenches;
- encapsulating the first dielectric layer and the one or more MEMS electrodes;
- and
- forming a cantilever device that is in electrical contact with the one or more MEMS electrodes.
Dependencies are inferred from the claim text.