Method for manufacturing thin film integrated circuit, and element substrate

A method for manufacturing a semiconductor device, comprising the steps of:

• forming a separation layer over a substrate;
• forming a first transistor and a second transistor over the separation layer;
• forming an insulating film over the first transistor, the second transistor, and the separation layer;
• forming a wiring over the insulating film;
• selectively etching the wiring and the insulating film, and forming a groove between the first transistor and the second transistor to expose a part of the separation layer, thereby forming a connection region;
• and
• separating the substrate by introducing an etchant into the groove and removing the separation layer,
• wherein the connection region is the part of the insulating film and the wiring, and
• wherein the first transistor and the second transistor are integrated by the connection region.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming a separation layer over a first substrate;
• forming a first chip including a first transistor and a second chip including a second transistor over the separation layer;
• forming an insulating film over the first transistor, the second transistor, and the separation layer;
• selectively etching the insulating film, and forming a groove between the first chip and the second chip to expose the separation layer;
• attaching a second substrate having an opening with the insulating film so that the opening is overlapped with the groove;
• separating the first substrate from the first chip and the second chip by introducing an etchant into the opening and removing the separation layer;
• and
• cutting the second substrate to separate the first chip from the second chip,
• wherein the first transistor and the second transistor are integrated by the second substrate before the step of cutting the second substrate.

A method for manufacturing a semiconductor device, comprising the steps of:

• forming a separation layer over a substrate;
• forming a first chip including a first transistor and a second chip including a second transistor over the separation layer;
• forming an insulating film over the first transistor, the second transistor, and the separation layer;
• forming a wiring over the insulating film;
• selectively etching the wiring and the insulating film, and forming a groove between the first chip and the second chip to expose a part of the separation layer, thereby forming a connection region;
• separating the substrate by introducing an etchant into the groove and removing the separation layer;
• and
• removing the connection region to separate the first chip from the second chip,
• wherein the connection region is the part of the insulating film and the wiring, and
• wherein the first chip and the second chip are integrated by the connection region before the step of removing the connection region.