Cell string of a memory cell array and method of erasing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJae-Ho Kim, Jae-Kwan Park, Byung-Jun Hwang, Sung-Bo Shim, Hye-Young Kwon
Life of this patent
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Abstract
A cell string included in a memory cell array of a nonvolatile memory device includes a plurality of memory cells, a string select transistor, and a ground select transistor. The plurality of memory cells are connected in series. The string select transistor is connected between a bitline and the plurality of memory cells, and has a structure substantially the same as a structure of each memory cell. The ground select transistor is connected between the plurality of memory cells and a common source line, and has a structure substantially the same as the structure of each memory cell.
Claims20
A cell string included in a memory cell array of a nonvolatile memory device, the cell string comprising:
- a plurality of memory cells connected in series;
- a string select transistor connected between a bitline and the plurality of memory cells, the string select transistor having a structure substantially the same as a structure of each memory cell;
- and
- a ground select transistor connected between the plurality of memory cells and a common source line, the ground select transistor having a structure substantially the same as the structure of each memory cell.
A cell string included in a memory cell array of a nonvolatile memory device, the cell string comprising:
- a plurality of memory cells connected in series;
- a plurality of string select transistors connected in series between a bitline and the plurality of memory cells, each string select transistor having a structure substantially the same as a structure of each memory cell;
- and
- a plurality of ground select transistors connected in series between the plurality of memory cells and a common source line, each ground select transistor having a structure substantially the same as the structure of each memory cell.
A method of erasing a cell string included in a memory cell array of a nonvolatile memory device, the method comprising:
- erasing a string select transistor, a plurality of memory cells and a ground select transistor that are connected in series;
- and
- programming the string select transistor and the ground select transistor.
Dependencies are inferred from the claim text.