Semiconductor device
AssigneeRenesas Electronics Corporation
InventorMasao SHINOZAKI
Life of this patent
Estimating the term…
Abstract
There is provided a technique for ensuring both an SNM and a write margin simultaneously in a semiconductor device having static memory cells. A semiconductor device has a plurality of static memory cells. The semiconductor device includes a memory cell array having the static memory cells arranged in a matrix, a temperature sensor circuit for sensing a temperature in the semiconductor device, and a word driver for controlling a voltage supplied to a word line of the memory cell array based on an output of the temperature sensor circuit at the time of writing to or reading from a memory cell.
Claims25
A semiconductor device having a plurality of static memory cells whose read margin is lower at high temperature and write margin is lower at low temperature, comprising:
- a memory cell array having the static memory cells arranged in a matrix;
- a temperature sensor circuit for sensing a temperature in the semiconductor device;
- a synchronize circuit;
- a fuse;
- and
- a voltage control circuit for controlling a voltage supplied to a selection word line of the memory cell array based on an output of the temperature sensor circuit and the fuse at the time of writing to or reading from a static memory cell,
- wherein the synchronize circuit synchronizes the output of the temperature sensor circuit, an address selection signal and a clock signal.
A semiconductor device having a plurality of static memory cells whose read margin is lower at high temperature and a write margin is lower at low temperature, comprising:
- a memory cell array having the static memory cells arranged in a matrix;
- a temperature sensor circuit for sensing a temperature in the semiconductor device;
- a synchronize circuit;
- a fuse;
- a driver circuit for supplying a voltage to a selection word line of the memory cell array;
- and
- a driver power supply circuit for changing a supplying voltage to the driver circuit based on an output of the temperature sensor circuit and the fuse at the time of writing to or reading from a static memory cell,
- wherein the synchronize circuit synchronizes the output of the temperature sensor circuit, an address selection signal and a clock signal.
A semiconductor device having a plurality of static memory cells whose read margin is lower at high temperature and a write margin is lower at low temperature, comprising:
- a memory cell array having the static memory cells arranged in a matrix;
- a temperature sensor circuit for sensing a temperature in the semiconductor device;
- a driver circuit for supplying a voltage to a selection word line of the memory cell array;
- and
- a driver power supply circuit for supplying the voltage to the driver circuit;
- wherein the voltage supplied from the driver power supply circuit changes continuously based on an output of the temperature sensor circuit so that the voltage on the selection word line changes based on an output of the temperature sensor circuit to keep the read margin at high temperature.
A semiconductor device having a plurality of static memory cells whose read margin is lower at high temperature and a write margin is lower at low temperature, comprising:
- a memory cell array having the static memory cells arranged in a matrix;
- a temperature sensor circuit for sensing a temperature in the semiconductor device;
- a driver circuit for supplying a voltage to a selection word line of the memory cell array;
- and
- a voltage step down circuit for changing the voltage to the driver circuit to a plurality of steps voltage based on an output of the temperature sensor circuit at the time of writing to or reading from a static memory cell.
Dependencies are inferred from the claim text.