Apparatuses and methods for physical layouts of analog-to-digital converters

Abstract

Physical layouts of integrated circuits are provided, which may include an analog-to-digital converter including a plurality of comparators. Individual transistors of each comparator of the plurality are arranged in a one-dimensional row in a first direction. Neighboring comparators of the plurality of comparators are positioned relative each other in an abutting configuration in a second direction orthogonal to the first direction. The plurality of comparators may include multiple, inter-coupled, outputs. Such an ADC may be called a Benorion Analog-to-Digital Converter. A method for fabricating an integrated circuit is also provided. The method comprises arranging transistors of a first comparator in a one-dimensional row in a first direction, arranging transistors of at least one additional comparator in the one-dimensional row in the first direction, and arranging transistors of the first comparator and the at least one additional comparator relative to each other in a second direction orthogonal to the first direction.

Dependencies are inferred from the claim text.