System for detecting a reset condition in an electronic circuit
AssigneeCerticom Corp.
InventorJay Scott FULLER
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Abstract
There is disclosed a system for detecting the assertion of a reset signal. A plurality of circuit elements is configurable by a reset signal to output a string of data values in a predetermined pattern. A comparator receives the string of data values and determines whether the string of data values matches the predetermined pattern. If so, the comparator generates an output signal indicative of a reset. In one embodiment, the output signal of the comparator can be used to automatically trigger a reset if the reset signal has not been asserted.
Claims9
1-8. (canceled)
A system for detecting a disturbance affecting a volatile storage of a computing device, the, said system comprising:
- a plurality of circuit elements for outputting a string of data values, each of said plurality of circuit elements operable to generate a data value of said string of data values by outputting a pre-determined output given an applied input signal, wherein each of said plurality of circuit elements is further sensitive to said disturbance, such that said pre-determined output may be affected;
- a comparator, including an input, said input for receiving said string of data values and determining whether said string of data values matches a predetermined pattern, wherein said comparator generates a reset signal when said string of data values fails to match said predetermined pattern to reset said computing device.
Dependencies are inferred from the claim text.