Semiconductor Package and Manufacturing Method Thereof
AssigneeAdvanpack Solutions Pte Ltd.
InventorsShoa Siong Lim, Kian Hock Lim
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Abstract
A semiconductor package and a manufacturing method thereof are disclosed. The semiconductor package includes a device carrier and a stiffener structure. The device carrier includes at least one insulating layer and at least conductive layer defining at least one trace layout unit. The stiffener structure is disposed on the device carrier, surrounding the periphery of the at least one trace layout unit. The stiffener structure is disposed away from the periphery of the at least one trace layout unit, forming a cavity with the device carrier. The shape and disposition of the stiffener structure enhance the strength of the semiconductor package, impeding flexure to the semiconductor package.
Claims33
A semiconductor package, comprising:
- a device carrier comprising at least one insulating layer and at least one conductive layer, wherein the at least one conductive layer forms at least one trace layout unit;
- and
- a stiffener structure disposed on the device carrier, surrounding the at least one trace layout unit, wherein the stiffener structure is spaced away from the periphery of the least one trace layout unit and forms a cavity with the carrier device.
A manufacturing method of semiconductor package, comprising:
- providing a base layer;
- forming a patterned trace layout on the base layer;
- forming an insulating layer on the base layer and covering the patterned trace layout for forming a semiconductor substrate;
- forming a plurality of stiffener structures on the insulating layer to form a plurality of cavities with the insulating layer;
- and
- breaking the semiconductor substrate along a plurality of spaced areas between the stiffener structures for forming a plurality of device carriers.
Dependencies are inferred from the claim text.