High temperature gate drivers for wide bandgap semiconductor power jfets and integrated circuits including the same

A circuit comprising:

• a first Junction Field-Effect Transistor (JFET) having a gate terminal, a source terminal and a drain terminal, wherein the gate terminal of the first JFET is electrically coupled to the source terminal of the first JFET;
• a second JFET having a gate terminal, a source terminal and a drain terminal, wherein the drain terminal of the second JFET is electronically coupled to the gate terminal and the source terminal of the first JFET;
• a third JFET having a gate terminal, a source terminal and a drain terminal, wherein the gate terminal of the third JFET is electrically coupled to the source terminal of the third JFET, and the drain terminal of the third JFET is electrically coupled to the drain terminal of the first JFET;
• and
• a fourth JFET having a gate terminal, a source terminal and a drain terminal, wherein the gate terminal of the fourth JFET is electrically coupled to the source terminal and the gate terminal of the first JFET and the drain terminal of the second JFET, the drain terminal of the fourth JFET is electronically coupled to the gate terminal and the source terminal of the third JFET, and the source terminal of the fourth JFET is electrically coupled to the source terminal of the second JFET.