Display apparatus
AssigneeNational University Corporation Tohoku University
InventorsSHIGETOSHI SUGAWA, AKINOBU TERAMOTO
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Abstract
There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section.
Claims4
A display apparatus for displaying unevenness in threshold voltages of a plurality of transistors under measurement provided on a substrate, the display apparatus comprising:
- a measuring apparatus which measures the threshold voltage of each of the transistors under measurement;
- a storage section which stores the threshold voltage of each of the transistors under measurement measured by the measuring apparatus in association with a position of the transistor under measurement within a surface of the wafer;
- and
- a display section which displays characteristic information corresponding to a voltage value of the threshold voltage of each of the transistors under measurement correspondingly to the position of the transistor under measurement, on a display surface which corresponds to a surface portion of the substrate.
A display apparatus for displaying unevenness in leak currents of a plurality of transistors under measurement provided on a substrate, the display apparatus comprising:
- a measuring apparatus which measures a leak current of each of the transistors under measurement;
- a storage section which stores the leak current of each of the transistors under measurement measured by the measuring section in association with a position of the transistor under measurement within a surface of the substrate;
- and
- a display section which displays characteristic information corresponding to a current value of the leak current of each of the transistors under measurement, correspondingly to the position of the transistor under measurement, on a display surface which corresponds to a surface portion of the substrate.
Dependencies are inferred from the claim text.