System and Method for Loop Timing Update of Energy Efficient Physical Layer Devices Using Subset Communication Techniques
AssigneeBroadcom Corporation
InventorsPeiqing Wang, Linghsiao Wang, Mehmet Tazebay, Scott Powell
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Abstract
A system and method for loop timing update of energy efficient physical layer devices using subset communication techniques. During a quiet period during which a subset of communication channels are transitioned from an active mode to a low-power mode, circuitry in the active channel can be designed to track, on behalf of the inactive channels, the phase drift due to the frequency offset. This tracking of the frequency estimation error would reduce the time required to perform a timing update for the communication channels when transitioning back to the active mode.
Claims18
An energy efficient Ethernet method in a device that supports a plurality of channels, comprising:
- transitioning by said device from an active mode to a low power mode where circuitry associated with each receiver that supports one of a subset of said plurality of channels is in a low power state;
- tracking a frequency estimation error of a clock recovered from a signal received by a receiver that supports one of said plurality of channels that remains in an active state during said low power mode of said device;
- and
- applying said frequency estimation error to each timing loop that supports one of said subset of said plurality of channels during a quiet period during which said subset of said plurality of channels is in said low power state, wherein said frequency estimation error enables each timing loop that supports one of said subset of said plurality of channels to track a phase drift created by said frequency estimation error during said quiet period.
An energy efficient Ethernet method for tracking a phase drift during a quiet period during which at least a first of a plurality of channels has transitioned to and remains in a low power state, comprising:
- after at least said first of said plurality of channels has transitioned to said low power state from an active state, tracking a frequency estimation error by at least a second of said plurality of channels that remains in said active state during said quiet period;
- during said quiet period, applying said frequency estimation error to timing loops of each of at least said first of said plurality of channels;
- and
- transitioning at least said first of said plurality of channels from said low power state back to said active state using said timing loops to which said frequency estimation error has been applied.
An energy efficient Ethernet device that supports both an active mode and a low power mode, wherein during said low power mode circuitry associated with each receiver that supports a subset of a plurality of channels is in a low power state, comprising:
- a first timing recovery loop associated with a receiver of a first channel that remains active during said low power mode of said energy efficient Ethernet device, said timing recovery loop tracking a frequency estimation error;
- and
- a second timing recovery loop associated with a receiver of a second channel in said subset of said plurality of channels, said second timing recovery loop receiving said frequency estimation error that is tracked by said first timing recovery loop, thereby enabling said second timing recovery loop to compensate for a phase drift created by said frequency estimation error while said receiver of said second channel is in said low power state.
Dependencies are inferred from the claim text.