Bipolar semiconductor device and manufacturing method
AssigneeInfineon Technologies Austria AG
InventorsHans-Joachim Schulze, Francisco Javier Santos Rodriguez
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Abstract
A bipolar semiconductor device with a hole current redistributing structure and an n-channel IGBT are provided. The n-channel IGBT has a p-doped body region with a first hole mobility and a sub region which is completely embedded within the body region and has a second hole mobility which is lower than the first hole mobility. Further, a method for forming a bipolar semiconductor device is provided.
Claims25
A bipolar semiconductor device comprising:
- a semiconductor substrate comprising a first surface, an opposite surface, a first and a second pn-junction arranged between the first surface and the opposite surface;
- a first metallization arranged on the first surface;
- a second metallization arranged on the opposite surface;
- and
- an insulated gate electrode arranged next to the first pn-junction;
- the semiconductor substrate further comprising a hole current redistributing structure which is completely embedded in the semiconductor substrate and arranged between the first electrode and the first pn-junction.
An n-channel IGBT, comprising:
- a p-doped body region comprising a first hole mobility;
- and
- a sub region completely embedded within the body region and comprising a second hole mobility which is lower than the first hole mobility.
A planar IGBT, comprising in a vertical cross-section:
- an emitter electrode;
- a collector electrode arranged below the emitter electrode;
- two p-type body regions;
- an insulated gate electrode arranged above the body regions;
- two p-type body contact regions each of which electrically connects a respective body region with the emitter electrode,
- an n-type drift region forming respective pn-junctions with the body regions;
- a p-type collector region arranged on the collector electrode;
- and
- two embedded structures arranged above the collector region and selected from a group consisting of a porous semiconductor region, a cavity, an insulating region, and a semiconductor region comprising additional scattering centers for holes;
- and
- where each of the embedded structures are arranged below a respective body contact region such that each of the two embedded structures overlaps, in a horizontal projection, with the respective body contact region.
A trench IGBT, comprising in a vertical cross-section:
- an emitter electrode;
- a p-type body region;
- an n-type drift region forming a pn-junction with the body region;
- an insulated gate electrode arranged in a vertical trench extending through the p-type body region into the drift region;
- a p-type body contact region electrically connecting the body region with the emitter electrode,
- a p-type collector region arranged below the drift region;
- and
- an embedded structure arranged above the collector region and selected from a group consisting of a porous semiconductor region, a cavity, and a semiconductor region comprising additional scattering centers for holes,
- the embedded structure being arranged below the body contact region such that the embedded structure and the body contact region overlap in a horizontal projection.
A method for forming a bipolar semiconductor device, comprising:
- providing a semiconductor substrate comprising a main horizontal surface, an n-type first semiconductor region, a p-type second semiconductor region and a pn-junction;
- forming a p-type third semiconductor region comprising a third doping concentration such that the first semiconductor region and the third semiconductor region form a further pn-junction above the pn-junction;
- forming an embedded structure above the pn-junction, the embedded structure comprising a hole mobility which is lower than the hole mobility of adjoining semiconductor regions;
- and
- forming a p-type fourth semiconductor region comprising a fourth doping concentration which is higher than the third doping concentration in electrical contact with the p-type third semiconductor region such that the fourth semiconductor region and the embedded structure are arranged in two vertical cross-sections which are orthogonal to each other and to the main surface.
Dependencies are inferred from the claim text.