Brute force channel decoding
OwnerDavid F. Chappazinventor
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OwnerDavid F. Chappazinventor
Estimating the term…
An embodiment of the present invention provides that pre-calculated code words corresponding to possible input bit sequences are stored in a UE, and then a similarity matching operation performed between a received coded bit sequence and the stored code words can be performed to identify that code word which most closely matches to the received sequence. Because the stored code words are associated with the original input bit sequences which produced those code words, by identifying the most closely correlating code word to a received coded sequence, then the input sequence which generated the matching code word can also be identified, and output as the decoder output. In this way, a more efficient decoding operation is obtained as decoding is no longer dependent upon a Viterbi decoding operation and moreover it is no longer necessary to implement a Viterbi decoder, instead merely requiring storage for the pre-calculated code words. In the specific case of the HS-SCCH Part 1 a code word table comprising 256 40 bit is required. This is significantly easier to implement and is more efficient in terms of chip area, than providing a dedicated Viterbi decoder to decode the HS-SCCH Part 1 channel.
A method of decoding a received coded bit sequence, comprising:
An apparatus comprising a decoder, the decoder comprising:
19-20. (canceled)
An apparatus comprising:
Dependencies are inferred from the claim text.