US 2011/0095434 A1 · APPARATUS AND METHODS OF FORMING MEMORY LINES AND STRUCTURES USING DOUBLE SIDEWALL PATTERNING FOR FOUR TIMES HALF PITCH RELIEF PATTERNING

Abstract

The present invention provides apparatus, methods, and systems for fabricating memory lines and structures using double sidewall patterning for four times half pitch relief patterning. The invention includes forming features from a first template layer disposed above a substrate, forming half-pitch sidewall spacers adjacent the features, forming smaller features in a second template layer by using the half-pitch sidewall spacers as a hardmask, forming quarter-pitch sidewall spacers adjacent the smaller features, and forming conductor features from a conductor layer by using the quarter-pitch sidewall spacers as a hardmask. Numerous additional aspects are disclosed.

Claims28

Dependent claims

A method of forming a wiring pattern for a memory, comprising:

forming first features from a first template layer disposed above a substrate;
forming first sidewall spacers adjacent the first features;
forming second features in a second template layer by using the first sidewall spacers as a hardmask;
forming second sidewall spacers adjacent the second features;
and
forming conductor features from a conductor layer by using the second spacers as a hardmask.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

12/911,887Filed 26 Oct 2010

Priority

26 Oct 2009

Published

28 Apr 2011

Term ends

Not estimatedThe source records don’t support an estimate.

Classification11 codes

G11C 5/06
Details of stores covered by group G11C11/00: arrangements for interconnecting storage elements electrically, e.g. by wiring
H10B 63/84
Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g.…:…
H10D 88/00
Three-dimensional [3d] integrated devices
H10D 89/10
Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00: integrated device layouts

Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning

Life of this patent

Apparatus and methods of forming memory lines and structures using double sidewall patterning for four times half pitch relief patterning

Life of this patent

Abstract

Claims28