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US 2011/0087942 A1Published application
Programmable Protocol Generator
AssigneeTeradyne, Inc.
InventorGeorge W. Conner
Life of this patent
Estimating the term…
Abstract
A semiconductor device tester includes programmable hardware configured to test a semiconductor device under test. The programmable hardware is programmed with two or more pattern generators to control a flow of data to and from the semiconductor device under test.
Claims18
A semiconductor device tester comprising:
- programmable hardware configured to test a semiconductor device under test, wherein the programmable hardware is programmed with two or more pattern generators to control a flow of data to and from the semiconductor device under test.
A method of testing a semiconductor device, the method comprising:
- programming hardware to test the semiconductor device, wherein the hardware includes:
- a transmit pattern generator that is capable of being programmed with operation codes to send bits of data to the semiconductor device under test;
- and
- a receive pattern generator that is capable of being programmed with operation codes to perform data operations on the received bits of data.
1 more element
A semiconductor device comprising:
- programmable hardware programmed with a receive pattern generator and a transmit pattern generator, wherein
- the transmit pattern generator is configured to transmit one or more bits of data to a semiconductor device under test;
- the receive pattern generator is configured to communicate with the transmit pattern generator;
- the receive pattern generator is configured to receive one or more bits of data from the semiconductor device under test;
- and
- the transmit pattern generator is configured to wait to receive a signal from the receive pattern generator prior to sending one or more second bits of data to the semiconductor device under test.
3 more elements
Dependencies are inferred from the claim text.