Jtag bus communication method and apparatus
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
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Abstract
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK terminal can be used as a serial I/O communication channel between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC. The use of the TMS and/or TCK terminal as serial I/O channels, as described, does not effect the standardized operation of the JTAG Tap, since the TMS and/or TCK I/O operations occur while the Tap is placed in a non-active steady state.
Claims7
An integrated circuit comprising:
- A. core circuitry having data destination circuitry and data source circuitry;
- B. a test mode select lead;
- C. a test clock input lead;
- and
- D. communication circuitry having state machine circuitry connected to the test mode select lead and the test clock input lead, data input circuitry coupled to the test mode select lead and the data destination circuitry and having a control input, and data output circuitry coupled to the data source circuitry and the test mode select lead and having a control input, the state machine circuitry having control outputs coupled with the control inputs of the data input circuitry and the data output circuitry.
Dependencies are inferred from the claim text.