Perceptron-based branch prediction mechanism for predicting conditional branch instructions on a multithreaded processor

A method comprising:

• an instruction fetch unit fetching a plurality of instructions belonging to one or more threads;
• one or more execution units concurrently executing the instructions from the one or more threads;
• a direction branch prediction unit providing for each of the one or more threads, a direction branch prediction for one or more conditional branch instructions in a cache line in response to receiving an instruction fetch address of a current conditional branch instruction;
• a control unit storing within each entry of a plurality of storages, one or more prediction values, wherein each prediction value of a given storage corresponds to at least one conditional branch instruction in the cache line;
• and
• the control unit generating a separate index value for accessing each storage, wherein the control unit further generating a first index value for accessing a first storage by combining one or more portions of the instruction fetch address, and generating each other index value for accessing each other respective storage by combining the first index value with a different portion of direction branch history information for each storage.

A system comprising:

• a multithreaded processor including a plurality of multithreaded processor cores, wherein each multithreaded processor core includes:
• an instruction fetch unit configured to fetch and maintain a plurality of instructions belonging to one or more threads;
• and
• one or more execution units configured to concurrently execute the one or more threads;
• wherein the instruction fetch unit includes a conditional branch prediction unit configured to provide for each of the one or more threads, a direction branch prediction for one or more conditional branch instructions in a cache line in response to receiving an instruction fetch address of a current conditional branch instruction, wherein the conditional branch prediction unit includes:
• a plurality of storages each including a plurality of entries, wherein each entry is configured to store one or more prediction values, and each prediction value of a given storage corresponds to at least one conditional branch instruction in the cache line;
• and
• a control unit coupled to the plurality of storages and configured to generate a separate index value for accessing each storage, wherein the control unit is configured to generate a first index value for accessing a first storage by combining one or more portions of the instruction fetch address, and to generate each other index value for accessing each other respective storage by combining the first index value with a different portion of direction branch history information for each storage.