Intermediate Register Mapper
AssigneeInternational Business Machines Corporation
InventorsBrian D. Barrick, Michael Billeci, Lee E. Eisen
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsBrian D. Barrick, Michael Billeci, Lee E. Eisen
Estimating the term…
A method, processor, and computer program product employing an intermediate register mapper within a register renaming mechanism. A logical register lookup determines whether a hit to a logical register associated with the dispatched instruction has occurred. In this regard, the logical register lookup searches within at least one register mapper from a group of register mappers, including an architected register mapper, a unified main mapper, and an intermediate register mapper. A single hit to the logical register is selected among the group of register mappers. If an instruction having a mapper entry in the unified main mapper has finished but has not completed, the mapping contents of the register mapper entry in the unified main mapper are moved to the intermediate register mapper, and the unified register mapper entry is released, thus increasing a number of unified main mapper entries available for reuse.
A method for administering a set of at least one physical register in a data processing system, said data processing system having a processor that processes instructions out-of-order, wherein said instructions reference logical registers, and wherein each of said logical registers is mapped to the set of at least one physical register, said method comprising:
A processor, comprising:
A computer program product, comprising:
Dependencies are inferred from the claim text.