Burst-based cache dead block prediction
AssigneeBoard of Regents, The University of Texas System
InventorsDoug Burger, Haiming Liu
Life of this patent
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AssigneeBoard of Regents, The University of Texas System
InventorsDoug Burger, Haiming Liu
Estimating the term…
The present disclosure generally relates to cache memory systems and/or techniques to identify dead cache blocks in cache memory systems. Example systems may include a cache memory that is accessible by a cache client. The cache memory may include a plurality of storage locations for a first cache block, with a most recently used position location in the cache memory. A cache controller may be configured to predict whether the first cache block stored in the cache memory is identified as a dead cache block based on a cache burst of the first cache block. The cache burst may comprise a first access of the first cache block by a cache client and any subsequent contiguous accesses of the first cache block following the first access by the cache client while the first cache block is in a most recently used position of the cache set.
A cache memory system comprising:
A method for operating a cache controller for a cache memory, comprising:
A computer accessible medium having stored thereon computer executable instructions for performing a procedure for a cache controller to identify dead cache blocks in a cache memory, wherein, when the procedure is executed by a processor, the processor is configured to perform the procedure comprising:
Dependencies are inferred from the claim text.