Data writing method for a flash memory, and controller and storage system using the same

A flash memory controller, for writing data from a host system into a flash memory chip, wherein the flash memory chip comprises a plurality of physical blocks and each of the physical blocks has a plurality of physical page addresses, the flash memory controller comprising:

• a microprocessor unit;
• a flash memory interface unit, coupled to the microprocessor unit, and configured to couple to the flash memory chip;
• a host interface unit, coupled to the microprocessor unit and configured to couple to the host system;
• and
• a memory management unit, coupled to the microprocessor unit and configured to configure a plurality of logical page addresses, group the logical page addresses into a plurality of logical blocks and record a data dispersion degree of each of the logical blocks, wherein the data dispersion degree of the logical block is the number of the physical blocks stored data belonging to the corresponding logical block,
• wherein the host interface unit receives write-in data from the host system, wherein the write-in data is written into a first logical page address, the first logical page address belongs to a first logical block, the first logical page address is one of the logical page addresses, and the first logical block is one of the logical blocks,
• wherein the memory management unit obtains a first physical page address, wherein the first physical page address is one of the physical page addresses,
• wherein the memory management unit writes the write-in data into the flash memory chip according to the data dispersion degree of the first logical block and the first physical page address,
• wherein the data dispersion degree of each of the logical blocks is not larger than a logical block data dispersion degree threshold value.

A flash memory storage system, comprising:

• a flash memory chip, having a plurality of physical blocks, wherein each of the physical blocks has a plurality of physical page addresses;
• a connector, configured to couple to a host system;
• a flash memory controller, coupled to the flash memory chip and the connector, and configured to configure a plurality of logical page addresses, group the logical page addresses into a plurality of logical blocks and record a data dispersion degree of each of the logical blocks, wherein the data dispersion degree of the logical block is the number of the physical blocks stored data belonging to the corresponding logical block,
• wherein the flash memory controller receives write-in data from the host system, wherein the write-in data is written into a first logical page address, the first logical page address belongs to a first logical block, the first logical page address is one of the logical page addresses, and the first logical block is one of the logical blocks,
• wherein the flash memory controller obtains a first physical page address, wherein the first physical page address is one of the physical page addresses,
• wherein the flash memory controller writes the write-in data into the flash memory chip according to the data dispersion degree of the first logical block and the first physical page address,
• wherein the data dispersion degree of each of the logical blocks is not larger than a logical block data dispersion degree threshold value.