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AssigneeArm Limited
InventorsPeter Andrew Riocreux, Bruce James Mathewson, Christopher William Laycock, Richard Roy Grisenthwaite
Estimating the term…
Interconnect circuitry for a data processing apparatus is disclosed. The interconnect circuitry is configured to provide data routes via which at least one initiator device may access at least one recipient device, said interconnect circuitry comprising: at least one input for receiving transaction requests from said at least one initiator device; at least one output for outputting transaction requests to said at least one recipient device; at least one path for transmitting said transaction requests between said at least one input and said at least one output; control circuitry for routing said received transaction requests from said at least one input to said at least one output; wherein said control circuitry is configured to respond to a barrier transaction request to maintain an ordering of at least some transaction requests with respect to said barrier transaction request within a stream of transaction requests passing along one of said at least one paths, by not allowing reordering of at least some transactions requests that occur before said barrier transaction request in said stream of transaction requests with respect to at least some transaction requests that occur after said bather transaction request in said stream of transaction requests; wherein said bather transaction request comprising an indicator indicating which of said transaction requests within said stream of transaction requests comprise said at least some transaction requests whose ordering is to be maintained.
Interconnect circuitry for a data processing apparatus, said interconnect circuitry being configured to provide data routes via which at least one initiator device may access at least one recipient device, said interconnect circuitry comprising:
An initiator device for issuing transaction requests to a recipient device via an interconnect, comprising:
A recipient device for receiving transaction requests from an interconnect, said transaction requests comprising barrier transaction requests, said barrier transaction requests being for maintaining an order of at least some transaction requests within a stream of transaction requests by not allowing reordering of said at least some of said transaction requests that occur before said barrier transaction request in said stream of transaction requests with respect to at least some of said transaction requests that occur after said barrier transaction request, said barrier transaction requests comprising an indicator indicating said at least some transaction requests whose ordering is to be maintained, said recipient device comprising:
A method for routing data from at least one initiator device to at least one recipient device via interconnect circuitry, said method comprising:
Dependencies are inferred from the claim text.