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AssigneeArm Limited
InventorsPeter Andrew Riocreux, Bruce James Mathewson, Christopher William Laycock, Richard Roy Grisenthwaite
Estimating the term…
Interconnect circuitry for a data processing apparatus is disclosed. The interconnect circuitry is configured to provide data routes via which at least one initiator device may access at least one recipient device, the interconnect circuitry comprising: at least one input for receiving transaction requests from the at least one initiator device; at least one output for outputting transaction requests to the at least one recipient device; at least one path for transmitting the transaction requests between the at least one input and the at least one output; control circuitry for routing said received transaction requests from said at least one input to said at least one output; wherein said control circuitry is configured to respond to a barrier transaction request to maintain an ordering of at least some transaction requests with respect to said barrier transaction request within a stream of transaction requests passing along one of said at least one paths, by not allowing reordering of at least some of said transactions requests that occur before said barrier transaction request in said stream of transaction requests with respect to at least some of said transaction requests that occur after said barrier transaction request in said stream of transaction requests; wherein said control circuitry comprises a response signal generator, said response signal generator being responsive to receipt of said barrier transaction request to issue a response signal, said response signal indicating to upstream blocking circuitry that any transaction requests delayed in response to said barrier transaction request can be transmitted further.
Interconnect circuitry for a data processing apparatus, said interconnect circuitry being configured to provide data routes via which at least one initiator device may access at least one recipient device, said interconnect circuitry comprising:
An initiator device for issuing transaction requests to a recipient device via an interconnect, comprising:
A recipient device for receiving transaction requests from an interconnect, said recipient device comprising a response signal generator, said response signal generator being configured in response to receiving a barrier transaction request comprising a blocking indicator to send a response to said barrier transaction request;
A method for routing data from at least one initiator device to at least one recipient device via interconnect circuitry, said method comprising:
Dependencies are inferred from the claim text.