Apparatuses, methods and systems for a truncated postal code smart address parser

An address-parsing apparatus, comprising:

• a memory;
• a processor disposed in communication with the memory, and configured to issue a plurality of processing instructions stored in the memory, wherein the instructions include:
• receive an input address string comprising a plurality of address component inputs;
• format the input address string into an input address array;
• identify by the address parsing processor at least one postal code element in the input address array;
• truncate the at least one postal code element to yield a postal code fragment;
• identify secondary address data based on the postal code fragment;
• and
• provide the secondary address data.

An address parsing processor-accessible medium, comprising:

• a plurality of processor-issuable instructions, wherein the instructions include:
• receive an input address string comprising a plurality of address component inputs;
• format the input address string into an input address array;
• identify by the address parsing processor at least one postal code element in the input address array;
• truncate the at least one postal code element to yield a postal code fragment;
• identify secondary address data based on the postal code fragment;
• and
• provide the secondary address data.