Growing a III-V Layer on Silicon using Aligned Nano-Scale Patterns
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChih-Hsin Ko, Clement Hsingjen Wann
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Abstract
A method of forming an integrated circuit structure includes providing a wafer having a silicon substrate; forming a plurality of shallow trench isolation (STI) regions in the silicon substrate; and forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the plurality of STI regions. Substantially all long sides of all recesses in the silicon substrate extend in a same direction. A III-V compound semiconductor material is then epitaxially grown in the recesses.
Claims19
A method of forming an integrated circuit structure, the method comprising:
- providing a silicon substrate;
- forming a plurality of shallow trench isolation (STI) regions in the silicon substrate;
- forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the plurality of STI regions, wherein substantially all long sides of all recesses in the silicon substrate extend in a same direction;
- and
- epitaxially growing a III-V compound semiconductor material in the recesses.
A method of forming an integrated circuit structure, the method comprising:
- providing a wafer comprising a silicon substrate, wherein the silicon substrate has a (001) surface orientation;
- forming a plurality of shallow trench isolation (STI) regions in the silicon substrate;
- forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the plurality of STI regions, wherein substantially all long sides of all recesses in the wafer extend in a <110> direction of the silicon substrate;
- and
- epitaxially growing GaAs films in the recesses, wherein during the step of epitaxially growing the GaAs films, an As-to-Ga flow ratio is lower than about 50, and a temperature of the silicon substrate is higher than about 400° C.
A method of forming an integrated circuit structure, the method comprising:
- providing a wafer comprising a silicon substrate, wherein the silicon substrate has a (001) surface orientation;
- forming a plurality of shallow trench isolation (STI) regions in the silicon substrate;
- forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the STI regions, wherein substantially all long sides of all recesses in the wafer extends in a <1-10> direction of the silicon substrate;
- and
- epitaxially growing GaAs films in the recesses, wherein during the step of epitaxially growing the GaAs films, an As-to-Ga flow ratio is greater than about 50, and a temperature of the silicon substrate is lower than about 400° C.
Dependencies are inferred from the claim text.