Methods of forming non-volatile memory structure with crested barrier tunnel layer

A method of forming a non-volatile memory cell structure, comprising:

• forming a first and second source/drain regions on a substrate, the first and second source/drain regions defining an intervening channel region;
• forming a charge blocking layer over the channel region;
• forming a trapping layer over the charge blocking layer, wherein the trapping layer is a dielectric containing a plurality of bulk trapping sites and wherein the plurality of bulk trapping sites comprise a plurality of nano-crystals embedded in the trapping layer;
• forming a tunnel layer of two or more sub-layers formed over the trapping layer, wherein the two or more sub-layers form a crested barrier tunnel layer;
• forming an injector silicon-rich-nitride (I-SRN) over the crested barrier tunnel layer;
• and
• forming a control gate over the injector silicon-rich-nitride (I-SRN).