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US 2011/0085401 A1Published application
Semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorBEOM-JU SHIN
Life of this patent
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Abstract
A semiconductor memory device includes: a first address buffer configured to be used in a test mode and a normal mode and to receive more addresses in the test mode than in the normal mode; and a second address buffer configured to be used in the normal mode and disabled in the test mode.
Claims10
A semiconductor device, comprising:
- a first input unit configured to receive addresses at a first timing of a clock signal;
- and
- a second input unit configured to receive addresses at a second timing of the clock signal and enabled in response to a control signal.
Dependencies are inferred from the claim text.