Semiconductor memory apparatus and data input/output method thereof
AssigneeHynix Semiconductor Inc.
InventorsSeung Wook KWACK, Kae Dal KWACK
Life of this patent
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Abstract
A semiconductor memory apparatus includes: a first bit line of to a first memory bank; a first middle input/output line configured to be electrically connected to the first bit line; a second bit line of a second memory bank; a second middle input/output line configured to be electrically connected to the second bit line; and a shared local input/output line configured to be electrically connected to the first and second middle input/output lines. A bank selection signal controls both the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line.
Claims23
A semiconductor memory apparatus comprising:
- a first bit line of a first memory bank;
- a first middle input/output line electrically connected to the first bit line;
- a second bit line of a second memory bank;
- a second middle input/output line electrically connected to the second bit line;
- and
- a shared local input/output line selectively electrically connected to each of the first and second middle input/output lines,
- wherein a bank selection signals control the electrical connection between the shared local input/output line and the first middle input/output line and the electrical connection between the shared local input/output line and the second middle input/output line.
A semiconductor memory apparatus comprising:
- a shared column decoding unit configured to simultaneously enable a column selection line of the first and second memory banks in response to a column address signal and a main strobe signal;
- an input/output switching unit configured to selectively electrically connect the first and second memory banks to a shared local input/output line in response to a bank selection signal;
- and
- a shared input/output driving unit configured to amplify data transferred via the shared local input/output line and transfer the amplified data onto a global input/output line in a data read operation, and to amplify data transferred via the global input/output line and transfer the amplified data onto the shared local input/output line in a data write operation, in response to the main strobe signal.
A semiconductor memory apparatus comprising:
- a first memory bank;
- a second memory bank;
- first and second middle input/output lines configured to communicate with the first and second memory banks respectively, in response to a column selection signal;
- and
- a shared local input/output line selectively electrically connected to the first and second middle input/output lines,
- wherein the column selection signal simultaneously enables communication of the first and second middle input/output lines with the first and second memory banks , and the electrical connection between the shared local input/output line and the first memory bank and the electrical connection between the shared local input/output line and the second memory bank are made selectively in response to a bank selection signal.
A data input/output method of a semiconductor memory apparatus comprising first and second memory banks and a local input/output line shared by the first and second memory banks, the data input/output method comprising:
- enabling a column selection signal of the first memory bank and the second memory bank when a data read/write operation is performed on the first memory bank and also when a data read/write operation is performed on the second memory bank;
- and
- electrically connecting only one of the first and second memory banks to the shared local input/output line depending upon on which of the first and second memory banks a data read/write operation is to be performed.
Dependencies are inferred from the claim text.