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AssigneeMacronix International Co., Ltd.
InventorsWen-Chiao Ho, Chin-Hung Chang, Kuen-Long Chang, Chun-Hsiung Hung
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A method of programming a memory, wherein the memory includes many memory regions having multiple multi-level cells. Each memory region includes a first bit line, a second bit line, a data buffer and a protecting unit. The protecting unit, coupled to the first and second bit lines, and the data buffer, prevents a programming error from occurring. In an embodiment of the programming method, corresponding data are inputted to the data buffers respectively. The data corresponding to an nth phase are programmed into the targeted multi-level cells. Data corresponding to an (n+1)th phase is modified to make the data corresponding to the (n+1)th phase be the same as the data corresponding to the nth phase if the targeted multi-level cells pass a programming verification process according to an nth programming verification voltage. The above steps are repeated until n is equal to a maximum, n being a positive integer.
A method of programming a memory, the memory including a plurality of memory regions each including a first bit line, a second bit line, a data buffer and a protecting unit, wherein the first bit line is coupled to a first column of multi-level cells, the second bit line is coupled to a second column of multi-level cells, the data buffer is coupled to the first bit line and the second bit line and is for storing data to be programmed into the multi-level cells, and the protecting unit is coupled to the first bit line, the second bit line and the data buffer and is for preventing a programming error, the programming method comprising the steps of:
The method according to claim 2, wherein programming of the memory is finished after it is judged that the targeted multi-level cells pass the programming verification process according to a final programming verification voltage.
Dependencies are inferred from the claim text.